Power estimation technique for DSP architectures

ARTICLE INFO ABSTRACT Keywords: Macromodel DSP architecture Digital filter Power estimation Intellectual property Monte Cario simulation The main goal of power estimation is to optimize the power consumption of a electronic design. Power is a strongly pattern dependent function. Input statistics greatly influence on average power. We solve the pattern dependence problem for intellectual property (IP) designs. In this paper, we present a power macro-modeling technique for digital signal processing (DSP) architectures in terms of the statistical knowledge of their primary inputs. During the power estimation procedure, the sequence of an input stream is generated by a genetic algorithm using input metrics. Then, a Monte Cario zero delay simulation is performed and a power dissipation macro-model function is built from power dissipation results. From then on, this macro-model function can be used to estímate power dissipation of the system just by using the statistics of the macro-block's primary inputs. In experiments with the DSP system, the average error is 26%.